grizzly/deneir
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

update

Browse source
This commit is contained in:
Arthur 2024-07-10 19:31:18 -04:00
parent a242dd2b46
commit 225122de54
1 changed files with 15 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

20
eet_instructions/eet_instructions.typ
View file

@ -15,16 +15,17 @@ When fully setup, the box should have all the software and the complete case ins
Before starting the setup, it is recomended to reset the boxe to wipe any remaining configuration. Before starting the setup, it is recomended to reset the boxe to wipe any remaining configuration.
To do so, provide power to the box by plugging in the ethernet cable and use a jumper cable to connect the 3.3V and ERASE pads on the base board for five seconds. To do so, provide power to the box by plugging in the ethernet cable and use a jumper cable to connect the 3.3V and ERASE pads on the base board for five seconds.
After removeing the jumber connection, power cycle the device. After removeing the jumper connection, power cycle the device.
= Flashing the FPGA
= Flashing FPGA
The FGPA is the largest square ship on the base board. The FGPA is the largest square ship on the base board.
The port to flash the FGPA is the vertical receptacle located the closest to the FPGA. The port to flash the FGPA is the vertical receptacle located the closest to the FPGA.
Here are the steps to follow to flash the FPGA. Here are the steps to follow to flash the FPGA.
+ Power ON the box using the ethernet cable. + Power ON the box using the ethernet cable.
+ Connect the FPGA adapter cable to the FPGA port on the base board and to a USB port on the PC. + Connect the FPGA adapter cable to the FPGA port on the base board and to a USB port on the PC.
+ If using a virtual machine, go to `Device` #sym.arrow `USB` and tick the box next to `FPGA Programmer Cable`. If the Latice Diamond software xwas already running, restart it. + If using a virtual machine, go to `Device` #sym.arrow `USB` and tick the box next to `FPGA Programmer Cable`. If the Latice Diamond software was already running and still cannot see the cable, restart it.
+ Start the Latice Diamond software and open the `palidaq` project. + Start the Latice Diamond software and open the `palidaq` project.
+ Go to `tools` #sym.arrow `Programmer`. + Go to `tools` #sym.arrow `Programmer`.
+ For the first time, change the file name to `fpga/src/impl1/palidaq_imp1.jed`. + For the first time, change the file name to `fpga/src/impl1/palidaq_imp1.jed`.
@ -36,15 +37,16 @@ Here are the steps to follow to flash the FPGA.
Congratulation, the FPGA is ready now. Congratulation, the FPGA is ready now.
= Flashing Base Firmware = Flashing Base Firmware
The base firmware is common to all boxes. The base firmware is common to all boxes.
To flash the base firmware to the Atmel microcontroller, follow these steps: To flash the base firmware to the Atmel microcontroller, follow these steps:
+ Power ON the box using the ethernet cable. + Power ON the box using the ethernet cable.
+ Connect the Atmel adapter to the base board using thevertical port closest to the Atml chip. + Connect the Atmel adapter to the base board using the vertical port closest to the Atmel chip.
+ If using a virtual machine, enable the USB device as for the FPGA. + If using a virtual machine, enable the USB device as for the FPGA.
+ Open the Microchip software. + Open the Microchip software.
+ Select `Tools` #sym.arrow `Device Programming`. + Select `Tools` #sym.arrow `Device Programming`.
+ ?? + #text(fill:red)[??]
+ In the Device dropdown select your device based on the final characters etched on the Atmel chip: + In the Device dropdown select your device based on the final characters etched on the Atmel chip:
+ ATSAMV71Q19B for the Q19 + ATSAMV71Q19B for the Q19
+ ATSAME70Q20B for the Q20 + ATSAME70Q20B for the Q20
@ -66,7 +68,7 @@ To set the security bits that disable recovery of the firmware, select `Security
The firmware of the box contains the information for the conecting to the server. The firmware of the box contains the information for the conecting to the server.
To get these information, you first need to register the new box in Palitronica system. To get these information, you first need to register the new box in Palitronica system.
The frontend \footnote[https://steetdev001.z27.web.core.windows.net/] lists all boxes across all tenants and can be used for some operations but we will mainly use it to register a new box. The frontend #footnote[https://steetdev001.z27.web.core.windows.net/] lists all boxes across all tenants and can be used for some operations but we will mainly use it to register a new box.
In order to register a new device, you need some information including the `MCU Serial` and the `MAC Address` of the box. In order to register a new device, you need some information including the `MCU Serial` and the `MAC Address` of the box.
These two info are not directly readable on the box and require to use a script on the machine. These two info are not directly readable on the box and require to use a script on the machine.
@ -146,4 +148,10 @@ The finale step is to restart the aggregator to apply all the changes.
Go on MinIO and verify that a folder with the name of the box was created and that some data started comming in. If not, good luck debugging this mess (I recomend redoing everything...). Go on MinIO and verify that a folder with the name of the box was created and that some data started comming in. If not, good luck debugging this mess (I recomend redoing everything...).
= Appendix
== Network Setup
The network setup to get the `udp_server.py` is specific so here are the instructions to replicate it.
- The PC running the `udp_server.py` script should get the IP `192.168.29.11`. I recomend setting a DHCP reservation at the router level.
- The boxes thould get an IP in the range `192.168.29.[101-120]`. I am not sure this is a scrict requirement but I recomend setting the DHCP range in the router to this range.