move to folder

2022-08-31 16:01:44 -04:00 · 2022-08-31 16:01:44 -04:00 · bc0c042845
commit bc0c042845
parent 22029f436c
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--- a/DSD/first_formalization_presentation/images/2022150712.pdf
+++ b/DSD/first_formalization_presentation/images/2022150712.pdf
--- a/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
+++ b/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
--- a/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
+++ b/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
--- a/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
+++ b/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
--- a/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
+++ b/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
--- a/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
+++ b/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
--- a/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
+++ b/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
--- a/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
+++ b/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
--- a/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
+++ b/DSD/first_formalization_presentation/images/NN_schematic_presentation_DSD_Page
--- a/DSD/first_formalization_presentation/images/detection_real_DELL-1_1NNmin.pdf
+++ b/DSD/first_formalization_presentation/images/detection_real_DELL-1_1NNmin.pdf
--- a/DSD/first_formalization_presentation/images/detection_real_DELL-1_1NNmin.png
+++ b/DSD/first_formalization_presentation/images/detection_real_DELL-1_1NNmin.png
--- a/DSD/first_formalization_presentation/images/detection_real_DELL-1_1_1NNmin.png
+++ b/DSD/first_formalization_presentation/images/detection_real_DELL-1_1_1NNmin.png
--- a/DSD/first_formalization_presentation/images/detection_real_DELL-1_2_1NNmin.png
+++ b/DSD/first_formalization_presentation/images/detection_real_DELL-1_2_1NNmin.png
--- a/DSD/first_formalization_presentation/images/detection_real___empty_0.5_1NNmin.png
+++ b/DSD/first_formalization_presentation/images/detection_real___empty_0.5_1NNmin.png
--- a/DSD/first_formalization_presentation/images/detection_real___empty_0.75_1NNmin.png
+++ b/DSD/first_formalization_presentation/images/detection_real___empty_0.75_1NNmin.png
--- a/DSD/first_formalization_presentation/images/detection_real___empty_1NNcenter.pdf
+++ b/DSD/first_formalization_presentation/images/detection_real___empty_1NNcenter.pdf
--- a/DSD/first_formalization_presentation/images/detection_real___empty_1NNmin.pdf
+++ b/DSD/first_formalization_presentation/images/detection_real___empty_1NNmin.pdf
--- a/DSD/first_formalization_presentation/images/detection_real___empty_1_1NNmin.png
+++ b/DSD/first_formalization_presentation/images/detection_real___empty_1_1NNmin.png
--- a/DSD/first_formalization_presentation/images/detection_real_asus_1_1NNmin.pdf
+++ b/DSD/first_formalization_presentation/images/detection_real_asus_1_1NNmin.pdf
--- a/DSD/first_formalization_presentation/images/detection_real_asus_1_1NNmin.png
+++ b/DSD/first_formalization_presentation/images/detection_real_asus_1_1NNmin.png
--- a/DSD/first_formalization_presentation/images/presentation_Page
+++ b/DSD/first_formalization_presentation/images/presentation_Page